I hate it too. The allocation of PCIe lanes is garbage unless you spend $500 on a motherboard. We should have had the lanes divided better once we hit 4.0 speeds. At 5.0 speeds, it's absurd that 16 full-speed lanes would go to a single slot except for very specialist scenarios.
Part of the problem is that it's quite difficult to get a PCIe 5.0 signal to travel further than the first slot while keeping the motherboard price reasonable by consumer standards.
